RTC clock synchronization buffer driver delay chip

The NB4N507A is a precision clock synthesizer that generates very low jitter differential PECL output clocks. It generates clock outputs based on integer multiples of the input reference frequency. The NB4N507A uses Phase Locked Loop (PLL) technology, accepts a standard fundamental mode crystal and will generate an output clock up to 200 MHz. In addition, the PLL circuit will generate a 50% duty cycle square clock output. The NB4N507A can be programmed to generate certain multiples of the input reference frequency. An accurate 155.52 MHz output clock can be generated based on a 19.44 MHz crystal with x8 multiplier option. The NB4N507A is suitable for low output jitter clock generation.