Logic device/transceiver/encoder

The MC14049B Hex Inverter/Buffer and MC14050B Non-Inverting Hex Buffer are constructed using MOS P-channel and N-channel enhancement mode devices in a monolithic structure. These complementary MOS devices are primarily used where low power consumption and/or high noise immunity are required. These devices provide logic level translation using only one supply voltage, VDD. The input signal high level (VIH) may exceed the VDD supply voltage for logic level translation. When the device is used as a CMOS-to-TTL/DTL converter (VDD = 5.0 V, VOL <= 0.4 V, IOL >= 3.2 mA), it can drive two TTL/DTL loads. Note that pins 13 and 16 cannot be connected internally to these devices; subsequent connections to these terminals will not affect circuit operation.

The LCX543 contains a non-inverting octal transceiver that includes two sets of D-type registers to temporarily store data flowing in either direction. Independent latch-enable and output-enable inputs are provided for each register to allow independent input and output control in either direction of data flow. The LCX543 is designed for low voltage (2.5V or 3.3V) V