Logic device/transceiver/encoder

The LVT373 and LVTH373 contain eight latches with 3-state outputs, suitable for system applications with bus structures. When the latch enable (LE) is high, the latch is transparent to the data. When LE is low, the data that meets the input timing requirements are latched. When output enable (OE#) is low, data is presented on the bus. When OE# is high, the bus output is in a high impedance state. The LVTH373 data inputs include a bus-hold feature that holds unused inputs without the need for external pull-up resistors. These octal latches are designed for low voltage (3.3V) V

Octal Bus Transceiver with 3-State Output and Series Damping Resistor 20-SSOP -40 to 85