Logic device/transceiver/encoder

High Speed ​​CMOS Logic 4-Bit Binary Counter with Asynchronous Reset 16-SOIC -55 to 125

High Speed ​​CMOS Logic Dual 4-Stage Binary Counter 14-SOIC -55 to 125

The MM74HC164 uses an advanced silicon-gate CMOS process. It has the high noise immunity and low power consumption of standard CMOS integrated circuits. It also offers speeds comparable to low power Schottky devices. This 8-bit shift register has gate serial inputs and CLEAR. Each register bit is a D-type master/slave flip-flop. Inputs A and B give complete control over the incoming data. A low on either or both inputs inhibits the entry of new data and resets the first flip-flop low on the next clock pulse. A high on one input enables the other, which then determines the state of the first flip-flop. Data at the serial input may change when the clock is high or low, but only information that meets the setup and hold time requirements is entered. Data is shifted serially into and out of the 8-bit register during the forward transition of the clock pulse. "Clear" is independent of the clock and is done with a low level at the "clear" input. The 74HC logic family is functionally and pin-out compatible with the standard 74LS logic family. All inputs are protected from electrostatic discharge damage by clamping internal diodes to VCC and ground.